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mdt10p257 this specification are subject to be changed without notice. any latest info rmation please visit our web site (http;//www.mdtic.com.tw) for detail p. 1 2011/02 ver 1.1 1. general description this eprom-based 8-bit micro-controller uses a fully static cmos design technology to combine higher speed and smaller size with the low power and high noise immunity. on chip memory system includes 2.0 k words of rom, and 80 bytes of static ram. 2. features the followings are some of the features on the hardware and software : fully cmos static design 8-bit data bus on chip rom size : 2 k words internal ram size : 80 bytes (72 general purpose, 8 special registers) 36 single word instructions 14-bit instructions 2-level stacks operating voltage : 2.3 v ~ 5.5 v operating frequency : 0 ~ 20 mhz the most fast execution time is 200 ns under 20 mhz in all single cycle instructions except the branch instructions. addressing modes include direct, indirect and relative addressing modes power-on reset (por) 4 types of power edge-detector reset: 1.8v , 2.1v , always enable 1.8v and disable sleep mode for power saving 2 oscillator start-up time : ext-r rc 150 s,20ms xt lf 20ms,80ms 8-bit real time clock/counter(rtcc) with 8-bit programmable prescaler 4 types of oscillator can be selected by user options : rc low cost rc oscillator lfxt low frequency crystal oscillator xtal standard crystal oscillator ext-r low cost r oscillator on-chip rc oscillator based watchdog timer(wdt) can be operated freely 20 i/o pins with their own independent direction control 20 i/o pins own independent weak pull-high and can be enabled by software. wdt can be enabled by software if wdt disable is selected in user option. 3. applications this mdt10p257 can be used in appliance motor control, high speed automotive, low power remote transmitters/receivers, pointing devices, and telecommunications processors. such as remote controller, small instruments, charger s, toy, automobile and pc peripheral ? etc.
mdt10p257 this specification are subject to be changed without notice. any latest info rmation please visit our web site (http;//www.mdtic.com.tw) for detail p. 2 2011/02 ver 1.1 4. pin assignment MDT10P257P11 mdt10p257s11 mdt10p257k11 rtcc 1 28 /mclr v dd 2 27 osc1 n/c 3 26 osc2 v ss 4 25 pc7 n/c 5 24 pc6 pa0 6 23 pc5 pa1 7 22 pc4 pa2 8 21 pc3 pa3 9 20 pc2 pb0 10 19 pc1 pb1 11 18 pc0 pb2 12 17 pb7 pb3 13 16 pb6 pb4 14 15 pb5 mdt10p257ss11 vss 1 28 /mclr rtcc 2 27 osc1 vdd 3 26 osc2 vdd 4 25 pc7 pa0 5 24 pc6 pa1 6 23 pc5 pa2 7 22 pc4 pa3 8 21 pc3 pb0 9 20 pc2 pb1 10 19 pc1 pb2 11 18 pc0 pb3 12 17 pb7 pb4 13 16 pb6 vss 14 15 pb5 5. order information mark rom (words) ram (bytes) i/o timer (8 bit) package mil MDT10P257P11 2k 72 28 1 28-dip 600 mil mdt10p257s11 2k 72 28 1 28-sop 300 mil mdt10p257ss11 2k 72 28 1 28-ssop 209 mil mdt10p257k11 2k 72 28 1 28-skinny 300 mil 6. pin function description pin name i/o function description pa0~pa3 i/o port a, ttl input level pb0~pb7 i/o port b, ttl input level pc0~pc7 i/o port c, ttl input level rtcc i real time clock/counter, schmitt trigger input levels /mclr i master clear, schmitt trigger input levels osc1 i oscillator input osc2 o oscillator output v dd power supply v ss ground
mdt10p257 this specification are subject to be changed without notice. any latest info rmation please visit our web site (http;//www.mdtic.com.tw) for detail p. 3 2011/02 ver 1.1 7. memory map 2. register map address description 00 indirect addressing register 01 rtcc 02 pc 03 status 04 msr 05 port a 06 port b 07 port c 08~0f internal ram, general purpose register 10~1f internal memory select register (bank 0) 30~3f internal memory select register (bank 1) 50~5f internal memory select register (bank 2) 70~7f internal memory select register (bank 3) note : 00~0f, 20~2f, 40~4f, 60~6f are accessed to the same memory location. 2. iar ( indirect address register) : r0 (2) rtcc (real time counter/counter register) : r1 (3) pc (program counter) : r2 write pc, call --- always 0 ljump, jump, lcall --- from instruction word rtwi, ret --- from stack a10 a9 a8 a7~a0 write pc, jump, call --- from b6-5 of status ljump, lcall --- from instruction word rtwi, ret --- from stack write pc --- from alu ljump, jump, lcall, call --- from instruction word rtwi, ret --- from stack
mdt10p257 this specification are subject to be changed without notice. any latest info rmation please visit our web site (http;//www.mdtic.com.tw) for detail p. 4 2011/02 ver 1.1 (4) status (status register) : r3 bit symbol function 0 1 2 3 4 6?5 7 c hc z pf tf page ?? carry bit half carry bit zero bit power loss flag bit time overflow flag bit page select bit : 00 : 000h --- 1ffh 01 : 200h --- 3ffh 10 : 400h --- 5ffh 11 : 600h --- 7ffh general purpose bit (5) msr (memory select register) : r4 memory select register : 00 : 10~1f 01 : 30~3f 10 : 50~5f 11 : 70~7f b7 b6 b5 b4 b3 b2 b1 b0 read only, always read as ?1? indirect addressing mode (6) port a : r5 pa3~pa0, i/o register (7) port b : r6 pb7~pb0, i/o register (8) port c : r7 pc7~pc0, i/o register
mdt10p257 this specification are subject to be changed without notice. any latest info rmation please visit our web site (http;//www.mdtic.com.tw) for detail p. 5 2011/02 ver 1.1 (9) tmr (time mode register) bit symbol function prescaler value rtcc rate wdt rate 2?0 ps2?0 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 1 : 2 1 : 4 1 : 8 1 : 16 1 : 32 1 : 64 1 : 128 1 : 256 1 : 1 1 : 2 1 : 4 1 : 8 1 : 16 1 : 32 1 : 64 1 : 128 3 psc prescaler assignment bit : 0 ? rtcc 1 ? watchdog timer 4 tce rtcc signal edge : 0 ? increment on low-to-high transition on rtcc pin 1 ? increment on high-to-low transition on rtcc pin 5 tcs rtcc signal set : 0 ? internal instruction cycle clock 1 ? transition on rtcc pin 6 phen global pull high enable set : 0 ? enable weak internal pull high 1 ? disable weak internal pull high this bit will be ignored if the ?i/o pull-hi? is disable in user option. 7 wdten watchdog timer enable set : 0 ? enable wdt 1 ? disable wdt (10) cpio a, cpio b, cpio c (control port i/o mode register) the cpio register is ?write-only? ?0?, i/o pin in output mode; ?1?, i/o pin in input mode. (11) set pull hi mode the pull hi register is ?write-only? ?0?, disable i/o pin pull hi ?1?, enable i/o pin pull hi do the cpio instructions twice within thr ee instructions on the same i/o port, then the second cpio instruction will set the corresponding pull-hi of i/o pins to enable when global pull high enable. correct instruction sequence to enable pull-high ex1: ldwi 0ffh cpio 06h first set portb i/o ldwi 0fh second
mdt10p257 this specification are subject to be changed without notice. any latest info rmation please visit our web site (http;//www.mdtic.com.tw) for detail p. 6 2011/02 ver 1.1 cpio 06h third enable pull hi of pb3-0 ex2 ldwi 0ffh cpio 06h first set portb i/o cpio 06h second enable pull hi of pb7-0 incorrect instruction sequence to enable pull-high ex1: (over three instructions) ldwi 0ffh cpio 06h first set portb i/o ldwi 0ffh second nop third cpio 06h fourth set portb i/o ex2 (different port) ldwi 0ffh cpio 06h first set portb i/o cpio 05h set porta i/o (12) user options by writer programming : osc type description ext-r low cost external r oscillator xt crystal oscillator lf low frequency crystal oscillator rc low cost rc oscillator ost description 150 us\ 20 ms ost= 150 us (for rc) or 20ms (for crystal) 20 ms\80 ms ost= 20 ms (for rc) or 80ms (for crystal) wdt description disable watchdog timer disable all the time (can be enabled by software,if software wdt enable) enable watchdog timer enable all the time (always enable) ped description disable ped disable low level 1.8v (disable during sleep) mid level 2.1v (disable during sleep) l(all on) always enable 1.8v security description disable security disable enable security enable
mdt10p257 this specification are subject to be changed without notice. any latest info rmation please visit our web site (http;//www.mdtic.com.tw) for detail p. 7 2011/02 ver 1.1 software wdt description enable wdt can be enabled by software disable wdt can?t be enabled by software freq x 2 description enable system clock is doubled disable system clock is the oscillation frequency i/o pull-hi description enable allow software to enable independent i/o pin pull-high disable disable all pull-high resistors clkout description enable allow osc2 to output clkout signal disable osc2 will be floating reset on err description enable the mcu will be reset if two illegal instructions are executed continuously. disable disable the illegal instruction reset function 8. reset condition for all registers register address power-on reset /mclr or wdt reset cpio a 1111 1111 1111 1111 cpio b 1111 1111 1111 1111 cpio c 1111 1111 1111 1111 tmr 1111 1111 1111 1111 iar 00h rtcc 01h xxxx xxxx uuuu uuuu pc 02h 1111 1111 1111 1111 status 03h 0001 1xxx 000# #uuu msr 04h 100x xxxx 100u uuuu port a 05h - - - - xxxx - - - - uuuu port b 06h xxxx xxxx uuuu uuuu port c 07h xxxx xxxx uuuu uuuu note : u = unchanged, x = unknown, - = unimplemented, read as ?0? # = value depends on the condition of the following table
mdt10p257 this specification are subject to be changed without notice. any latest info rmation please visit our web site (http;//www.mdtic.com.tw) for detail p. 8 2011/02 ver 1.1 condition status: bit 4 status: bit 3 /mclr reset (not during sleep) u u /mclr reset during sleep 1 0 wdt reset (not during sleep) 0 1 wdt reset during sleep 0 0 9. instruction set instruction code mnemonic operands function operating status 010000 00000000 nop no operation none 010000 00000001 clrwt clear watchdog timer 0 wt tf, pf 010000 00000010 sleep sleep mode 0 wt,stop osc tf, pf 010000 00000011 tmode load w to tmode register w tmode none 010000 00000100 ret return stack pc none 010000 00000rrr cpio r control i/o port register w cpio r none 010001 1rrrrrrr stwr r store w to register w r none 011000 trrrrrrr ldr r t load register r t z 111010 iiiiiiii ldwi i load immediate to w i w none 010111 trrrrrrr swapr r t swap halves register [r(0~3) ? r(4~7)] t none 011001 trrrrrrr incr r t increment register r + 1 t z 011010 trrrrrrr incrsz r increment register skip if zero r + 1 t none 011011 trrrrrrr addwr r t add w and register w + r t c hc z 011100 trrrrrrr subwr r t subtract w from register r w t (r+/w+1 t) c hc z 011101 trrrrrrr decr r t decrement register r 1 t z 011110 trrrrrrr decrsz r t decrement register skip if zero r 1 t none 010010 trrrrrrr andwr r t and w and register r w t z 110100 iiiiiiii andwi i and w and immediate i w w z 010011 trrrrrrr iorwr r t inclu. or w and register r w t z 110101 iiiiiiii iorwi i inclu. or w and immediate i w w z 010100 trrrrrrr xorwr r t exclu. or w and register r w t ? z 110110 iiiiiiii xorwi i exclu. or w and immediate i w w ? z 011111 trrrrrrr comr r t complement register /r t z 010110 trrrrrrr rrr r t rotate right register r(n) r(n-1) c r(7) r(0) c c
mdt10p257 this specification are subject to be changed without notice. any latest info rmation please visit our web site (http;//www.mdtic.com.tw) for detail p. 9 2011/02 ver 1.1 instruction code mnemonic operands function operating status 010101 trrrrrrr rlr r t rotate left register r(n) (n+1) c r(0) r(7) c c 010000 1xxxxxxx clrw clear wo rking register 0 w z 010001 0rrrrrrr clrr r clear register 0 r z 0000bb brr r rrrr bcr r b bit clear 0 r(b) none 0010bb brrrrrrr bsr r b bit set 1 r(b) none 0001bb brrrrrrr btsc r b bit test skip if clear skip if r(b)=0 none 0011bb brrrrrrr btss r b bit test skip if set skip if r(b)=1 none 100nnn nnnnnnnn lcall n long call subroutine n pc pc+1 stack none 101nnn nnnnnnnn ljump n long jump to address n pc none 110000 nnnnnnnn call n call subroutine n pc, pc+1 stack none 110001 iiiiiiii rtwi i return, place immediate to w stack pc, i w none 11001n nnnnnnnn jump n jump to address n pc none note : w : working register b : bit position wt : watchdog timer t : target tmode : tmode mode register 0 : working register cpio : control i/o port register 1 : general register tf : timer overflow flag r : general register address pf : power loss flag c : carry flag pc : program counter hc : half carry osc : oscillator z : zero flag inclu. : inclusive ? ? / : complement exclu. : exclusive ? ? ? x : don?t care and : logic and ? ? i : immediate data ( 8 bits ) n : immediate address 10. electrical characteristics (a) operating voltage & frequency v dd s 2.3 v ~ 5.5 v frequency s 0 hz ~ 20 mhz
mdt10p257 this specification are subject to be changed without notice. any latest info rmation please visit our web site (http;//www.mdtic.com.tw) for detail p. 10 2011/02 ver 1.1 (b) input voltage @ v dd 5.0 v, temperature 25 port min. max. v il pa, pb, pc rtcc, /mclr v ss v ss 1.0 v 1.0 v v ih pa, pb, pc rtcc, /mclr 2.0 v 3.3 v v dd v dd threshold voltage : port a, port b, port c v th 1.5 v rtcc, /mclr v il 1.2 v, v ih 3.1v (schmitt trigger) (c) output voltage @ v dd 5.0 v, temperature 25 , the typical value as followings : pa, pb, pc port i oh 20.0 ma v oh 3.40 v i ol 20.0 ma v ol 0.50 v i oh 5.0 ma v oh 4.50 v i ol 5.0 ma v ol 0.20 v (d) leakage current @ v dd 5.0 v, temperature 25 , the typ ical value as followings : i il 0.1 a (max.) i ih 0.1 a (max.) (e) sleep current @wdt disable, temperature 25 , the typical value as followings : v dd 2.3 v i dd 1.0 a v dd 3.0 v i dd 1.0 a v dd 4.0 v i dd 1.0 a v dd 5.0 v i dd 1.0 a v dd 6.0 v i dd 1.0 a
mdt10p257 this specification are subject to be changed without notice. any latest info rmation please visit our web site (http;//www.mdtic.com.tw) for detail p. 11 2011/02 ver 1.1 @wdt enable, temperature 25 , the typical value as followings : v dd 2.3 v i dd 1.0 a v dd 3.0 v i dd 1.2 a v dd 4.0 v i dd 3.0 a v dd 5.0 v i dd 5.0 a v dd 6.0 v i dd 10 a f) operating current temperature 25 , the typical value as followings : (i) osc type rc; wdt enable; @ v dd 5.0 v ped=disable cext. (f) rext. (ohm) fr equency (hz) current (a) 4.7 k 9.16 m 1.40ma 10.0 k 5.6 m 1.00ma 3p 47.0 k 1.44 m 350 a 100.0 k 718.4 k 250 a 300.0 k 245.2 k 200 a 470.0 k 154.8 k 180 a 4.7 k 4.72 m 820a 10.0 k 2.73 m 550 a 20p 47.0 k 649.6 k 250 a 100.0 k 318.4 k 200 a 300.0 k 107.2 k 170 a 470.0 k 67.6 k 160 a 4.7 k 1.68 m 400 a 10.0 k 934 k 300 a 100p 47.0 k 212.8 k 200 a 100.0 k 103.2 k 175 a 300.0 k 34.6 k 160 a 470.0 k 21.8 k 150 a
mdt10p257 this specification are subject to be changed without notice. any latest info rmation please visit our web site (http;//www.mdtic.com.tw) for detail p. 12 2011/02 ver 1.1 cext. (f) rext. (ohm) fr equency (hz) current (a) 4.7 k 716 k 300 a 10.0 k 392.4 k 220 a 300p 47.0 k 87.6 k 170 a 100.0 k 42.4 k 160 a 300.0 k 14.2 k 155 a 470.0 k 8.8 k 145 a (ii) osc type lf (osc1&osc2 external cap about 20p); wdt disable r ped=disable voltage/frequency 32 k (ext 50p) 455 k 1 m sleep 2.3 v 5.6 a 2.5v@21.8 a 38.0 a 1.0 a 3.0 v 11.5 a 47.7 a 70.0 a 1.0 a 4.0 v 28.7 a 92.6 a 125.0 a 1.0 a 5.0 v 50.0 a 150 a 190.0 a 1.0 a 6.0 v 135.0 a 225.0 a 270.0 a 1.0 a (iii) osc type xt (osc1&osc2 external cap about 10p); wdt enable r ped=disable voltage/frequency 1 m 4 m 10 m sleep 2.1 v 39.0 a 120.0 a 280.0 a 1.0 a 3.0 v 85.0 a 240.0 a 480.0 a 1.2 a 4.0 v 160.0 a 400.0 a 660.0 a 3.0 a 5.0 v 260.0 a 600.0 a 1.1 ma 5.0 a 6.0 v 400.0 a 840.0 a 1.5 ma 10.0 a
mdt10p257 this specification are subject to be changed without notice. any latest info rmation please visit our web site (http;//www.mdtic.com.tw) for detail p. 13 2011/02 ver 1.1 (iv) osc type extr ; wdt enable; @ v dd 5.0 v ped=enable rext. (ohm) frequency (hz) current (a) 2.3v 6.56 m 1.7 m 3.0v 7.10m 1.8 m 4.0v 7.62m 2.8 m 5.0v 7.93 m 3.8 m 6.2 k 5.5v 8.02m 4.3 m 2.3v 3.62 m 750 u 3.0v 3.90m 1.1 m 4.0v 4.09m 1.7 m 5.0v 4.19 m 2.4 m 15.0 k 5.5v 4.22m 2.7 m 2.3v 965.7 k 220 u 3.0v 995.7 k 330 u 4.0v 1.01 m 600 u 5.0v 1.02 m 880 u 75.0 k 5.5v 1.02 m 1.1 m 2.3v 417.7 k 100 u 3.0v 424.9 k 185 u 4.0v 428.9 k 380 u 5.0v 431.3 k 640 u 180.0 k 5.5v 432.4 k 790 u 2.3v 154.2 k 45 u 3.0v 155.5 k 110 u 4.0v 156.3 k 280 u 5.0v 157 k 510 u 510.0 k 5.5v 157.3 k 640 u 2.3v 72.8 k 30 u 3.0v 73.2 k 90 u 4.0v 73.6 k 250 u 5.0v 73.9 k 480 u 1.1 m 5.5v 74 k 615 u 2.3v 33.4 k 20 u 3.0v 33.5 k 80 u 4.0v 33.7 k 240 u 5.0v 33.8 k 470 u 2.4 m 5.5v 33.9 k 600 u
mdt10p257 this specification are subject to be changed without notice. any latest info rmation please visit our web site (http;//www.mdtic.com.tw) for detail p. 14 2011/02 ver 1.1 (g) power edge-detector reset voltage (n ot in sleep mode) (ped :enable) v pr(low level) 1.6~1.8 v Q v pr s v dd (power supply) v pr(mid level) 1.9~2.1 v Q ps. if ped_enable then internal power_on_reset will be off (h) the basic wdt time-out cycle time @temperature 25 , the typical value as followings : v dd =5.0 v, temperature=25 ,the typical v alue as followings: voltage (v) basic wdt time-out cycle time (ms) 2.3 28.5 3.0 25.0 4.0 21.9 5.0 20.3 6.0 19.1
mdt10p257 this specification are subject to be changed without notice. any latest info rmation please visit our web site (http;//www.mdtic.com.tw) for detail p. 15 2011/02 ver 1.1 11 . port a ,port b and port c equivalent circuit working register i/o control write data bus read data o/p latch d ck d i/o control latch ck q b q q ck q b d input resistor port i/o pin data i/p latch ttl input level data i/p control pull-high pull high resistor
mdt10p257 this specification are subject to be changed without notice. any latest info rmation please visit our web site (http;//www.mdtic.com.tw) for detail p. 16 2011/02 ver 1.1 12. mclrb and rtcc input equivalent circuit r 1 k P schmitt trigger mclrb r 1 k P schmitt trigger rtcc
mdt10p257 this specification are subject to be changed without notice. any latest info rmation please visit our web site (http;//www.mdtic.com.tw) for detail p. 17 2011/02 ver 1.1 13. block diagram two levels stack program counter oscillator circuit power on reset ped 8-bit timer/counter eprom 2048 14 instruction register instruction decoder working register alu prescaler ram 72*8 special register control circuit status register wdt/ost timer port a port b port c osc1 osc2 mclr data 8-bit rtcc 11 bits 11 bits 14 bits port pa0~pa3 4 bits port pb0~pb7 8 bits port pc0~pc7 8 bits d0~d7 pull high pull high pull high
mdt10p257 this specification are subject to be changed without notice. any latest info rmation please visit our web site (http;//www.mdtic.com.tw) for detail p. 18 2011/02 ver 1.1 14. external capacitor selection for crystal oscillator @ v dd 3.0 v~ 5.0 v osc. type resonator freq. c1 c2 10 mhz 10 pf ~30 pf 10 pf ~50 pf xt 4 mhz 10 pf ~50 pf 20 pf ~100 pf 1 mhz 10 pf ~30 pf 20 pf ~50 pf 1 mhz 3 pf ~5 pf 3 pf ~5 pf lf 455 k 10 pf ~30 pf 20 pf ~50 pf 32 k 10 pf ~20 pf 15 pf ~30 pf xt oscillator mode lf oscillator mode ext-r oscillator mode rc oscillator mode mdt10p257 osc1 osc2 c1 c2 mdt10p257 osc1 osc2 mdt10p257 osc1 osc2 fosc/4 the above values of the external capacitor ar e listed for reference but the higher capacitance will increases the start-up time.

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